Items where Author is "Pamunuwa, Dinesh B."

Weerasekera, Roshan and Grange, M. and Pamunuwa, Dinesh B. and Tenhunen, Hannu (2010) On signalling over through-silicon via (TSV) interconnects in 3-D integrated circuits. In: Design Automation and Test in Europe (DATE) Conference, 2010-01-01.

Weerasekera, Roshan and Pamunuwa, Dinesh B. and Grange, M. and Tenhunen, Hannu and Zheng, Li-Rong (2009) Closed-form equations for through-silicon via (TSV) parasitics in 3-D integrated circuits (ICs). In: Workshop Notes, Design, Automation and Test in Europe (DATE) :. UNSPECIFIED, Nice.

Lei, Ci and Pamunuwa, Dinesh B. and Bailey, Stephen and Lambert, Colin (2009) Design of robust molecular electronic circuits. In: IEEE International Symposium on Circuits and Systems, 2009. ISCAS 2009. :. IEEE, Taiwan, pp. 1819-1822. ISBN 978-1-4244-3827-3

Lei, Ci and Pamunuwa, Dinesh B. and Bailey, Stephen and Lambert, Colin (2008) Application of molecular electronics devices in digital circuit design. In: Nano-Net Third International ICST Conference, NanoNet 2008, Boston, MA, USA, September 14-16, 2008, Revised Selected Papers :. Lecture Notes of the Institute for Computer Sciences, Social Informatics and Telecommunications Engineering . Springer, Berlin, pp. 61-65. ISBN 978-3-642-02426-9

Weerasekera, Roshan and Pamunuwa, Dinesh B. and Zheng, Li-Rong and Tenhunen, Hannu (2008) Minimal-power, delay-balanced smart repeaters for global interconnects in the nanometer regime. IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 16 (5). pp. 589-593. ISSN 1063-8210

Pamunuwa, Dinesh B. (2008) Memory technology for extended large-scale integration in future electronics applications. In: Proc. Design, Automation and Test in Europe (DATE) Conference :. IEEE, Munich, pp. 1126-1127. ISBN 978-3-9810801-3-1

Weerasekera, Roshan and Zheng, Li-Rong and Pamunuwa, Dinesh B. and Tenhunen, Hannu (2007) Extending systems-on-chip to the third dimension : performance, cost and technological tradeoffs. In: Proc. IEEE/ACM International Conference on Computer-Aided Design (ICCAD) :. IEEE, San Jose, California, pp. 212-219. ISBN 978-1-4244-1382-9

Weerasekera, Roshan and Zheng, Li-Rong and Pamunuwa, Dinesh B. and Tenhunen, Hannu (2007) Early selection of system implementation choice among SoC, SoP and 3-D integration. In: Proc. International System-On-Chip Conference (SOCC) :. IEEE, Hsin Chu, Taiwan. ISBN 978-1-4244-1592-2

Lei, Ci and Pamunuwa, Dinesh B. and Bailey, Stephen and Lambert, Colin (2007) Molecular electronics device modeling for system design. In: Proc. IEEE International Conference on Nanotechnology :. IEEE, Hong Kong, pp. 1116-1119. ISBN 1-4244-0608-0

Weerasekera, Roshan and Pamunuwa, Dinesh B. and Zheng, Li-Rong and Tenhunen, Hannu (2007) Delay-balanced smart repeaters for on-chip global signaling. In: Proc. International Conference on VLSI Design :. IEEE, Bangalore, pp. 308-313. ISBN 0-7695-2762-0

Weerasekera, Roshan and Pamunuwa, Dinesh B. and Zheng, Li-Rong and Tenhunen, Hannu (2006) Minimal-power, delay-balanced smart repeaters for interconnects in the nanometer regime. In: Proc. International Workshop on System-level Interconnect Prediction (SLIP) :. ACM, Munich, pp. 113-120. ISBN 1-59593-255-0

Pamunuwa, Dinesh B. (2005) Modelling delay and noise in arbitrarily coupled RC trees. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 24 (11). pp. 1725-1739. ISSN 0278-0070

Pamunuwa, Dinesh B. and Öberg, Johnny and Millberg, Mikael and Zheng, Li-Rong and Jantsch, Axel and Tenhunen, Hannu (2004) A study on the implementation of 2-D mesh-based networks-on-chip in the nanometre regime. Integration, the VLSI Journal, 38 (1). pp. 3-17. ISSN 0167-9260

Weerasekera, Roshan and Pamunuwa, Dinesh B. and Zheng, L. R. and Tenhunen, H. (2004) Crosstalk immune interconnect driver design. In: Proceedings of the international symposium on system-on-chip conference :. UNSPECIFIED, pp. 139-142.

Pamunuwa, Dinesh B. and Tenhunen, H. and Zheng, L. (2003) Maximizing throughput over parallel wire structures in the deep submicrometer regime. IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 11 (2). pp. 224-243. ISSN 1063-8210

Pamunuwa, Dinesh B. and Elassaad, S. and Tenhunen, H. (2003) Modelling noise and delay in VLSI circuits. Electronics Letters, 39 (3). pp. 269-271. ISSN 0013-5194

Pamunuwa, Dinesh B. and Elassaad, Shauki and Tenhunen, Hannu (2003) Analytic modeling of interconnects for deep submicron circuits. In: 2003 International Conference on Computer-Aided Design (ICCAD'03) :. IEEE Computer Society, San Jose, California, pp. 835-842. ISBN 1-58113-762-1

Pamunuwa, Dinesh B. and Elassaad, Shauki (2003) Closed form metrics to accurately model the response in general arbitrarily-coupled RC trees. In: Proceedings of the 2003 International Symposium on Circuits and Systems, 2003. ISCAS '03. :. IEEE, IV-604. ISBN 0-7803-7761-3

Pamunuwa, Dinesh B. and Öberg, Johnny and Zheng, Li-Rong and Millberg, Mikael and Jantsch, Axel and Tenhunen, Hannu (2003) Layout, performance and power trade-offs in mesh-based network-on chip architectures. In: Proc. IFIP International Conference on VLSI Systems-on-chip :. Technische Universität Darmstadt, Insitute of Microelectronic Systems, Darmstadt, Germany, pp. 362-366. ISBN 3-901882-17-0

Pamunuwa, Dinesh B. (2003) Modelling and analysis of interconnects for deep submicron systems-on-chip. Royal Institute of Technology, Stockholm. ISBN 91-7283-631-8

Liu, J. and Zheng, Li-Rong and Pamunuwa, Dinesh B. and Tenhunen, Hannu (2003) A global wire planning scheme for Network-on-Chip. In: Proceedings of the 2003 International Symposium on Circuits and Systems, 2003. ISCAS '03. :. UNSPECIFIED, IV-892-IV-895. ISBN 0-7803-7761-3

Pamunuwa, Dinesh B. and Tenhunen, Hannu (2002) On dynamic delay and repeater insertion in distributed capacitively coupled interconnects. In: International Symposium on Quality Electronic Design, 2002. Proceedings. :. IEEE, pp. 240-245. ISBN 0-7695-1561-4

Tenhunen, Hannu and Pamunuwa, Dinesh B. (2002) On dynamic delay and repeater insertion. In: IEEE International Symposium on Circuits and Systems, 2002 :. IEEE, pp. 97-100. ISBN 0-7803-7448-7

Pamunuwa, Dinesh B. and Zheng, Li-Rong and Tenhunen, Hannu (2002) Optimising bandwidth over deep sub-micron interconnect. In: 2002 IEEE International Symposium on Circuits and Systems :. IEEE, IV-193. ISBN 0-7803-7448-7

Pamunuwa, Dinesh B. and Tenhunen, Hannu (2001) Repeater insertion to minimise delay in coupled interconnects. In: Fourteenth International Conference on VLSI Design, 2001. :. IEEE, Bangalore, India, pp. 513-517. ISBN 0-7695-0831-6

Zheng, Li-Rong and Pamunuwa, Dinesh B. and Tenhunen, Hannu (2000) Accurate a priori signal integrity estimation using a multilevel dynamic interconnect model for deep submicron VLSI design. In: Proceedings of the 26th European Solid-State Circuits Conference, 2000. ESSCIRC '00. :. IEEE, pp. 352-355.

Pamunuwa, Dinesh B. and Zheng, Li-Rong and Tenhunen, Hannu (2000) Combating digital noise in high speed ULSI circuits using binary BCH encoding. In: The 2000 IEEE International Symposium on Circuits and Systems, 2000. Proceedings. ISCAS 2000 Geneva. :. IEEE, Geneva, pp. 13-16. ISBN 0-7803-5482-6

Pamunuwa, Dinesh B. and Zheng, Li-Rong and Tenhunen, Hannu (1999) Error-control coding to combat digital noise in interconnects for ULSI circuits. In: Proc. IEEE Norchip Conference Oslo 1999 :. IEEE, Norway, pp. 275-282.