Layout, performance and power trade-offs in mesh-based network-on chip architectures.

Pamunuwa, Dinesh B. and Öberg, Johnny and Zheng, Li-Rong and Millberg, Mikael and Jantsch, Axel and Tenhunen, Hannu (2003) Layout, performance and power trade-offs in mesh-based network-on chip architectures. In: Proc. IFIP International Conference on VLSI Systems-on-chip. Technische Universität Darmstadt, Insitute of Microelectronic Systems, Darmstadt, Germany, pp. 362-366. ISBN 3-901882-17-0

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33248
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Deposited On:
07 May 2010 14:03
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No
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Published
Last Modified:
02 Mar 2020 04:34