Items where Author is "Grange, M."

Contribution in Book/Report/Proceedings

Weerasekera, Roshan and Grange, M. and Pamunuwa, Dinesh Bandara and Tenhunen, Hannu and Zheng, Li-Rong (2009) Compact modelling of through-silicon vias (TSVs) in three-dimensional (3-D) integrated circuits. In: Proceedings of the IEEE International Conference on 3D System Integration (3D IC), 2009 :. IEEE, San Francisco. ISBN 978-1-4244-4511-0

Weldezion, A. Y. and Grange, M. and Pamunuwa, Dinesh Bandara and Lu, Zhonghai and Jantsch, A. and Weerasekera, Roshan and Tenhunen, Hannu (2009) Scalability of Network-on-Chip communication architecture for 3-D meshes. In: Proc. ACM/IEEE International Symposium on Networks on Chip (NOCS) :. IEEE, San Diego, pp. 114-123. ISBN 978-1-4244-4142-6

Weerasekera, Roshan and Pamunuwa, Dinesh B. and Grange, M. and Tenhunen, Hannu and Zheng, Li-Rong (2009) Closed-form equations for through-silicon via (TSV) parasitics in 3-D integrated circuits (ICs). In: Workshop Notes, Design, Automation and Test in Europe (DATE) :. UNSPECIFIED, Nice.

Grange, M. and Weerasekera, R. and Pamunuwa, D. and Tenhunen, H. (2009) Exploration of Through Silicon Via Interconnect Parasitics for 3-Dimensional Integrated Circuits. In: Workshop Notes, Design, Automation and Test in Europe (DATE) :. UNSPECIFIED, Nice.

Grange, M. and Weldezion, A. Y. and Pamunuwa, Dinesh Bandara and Weerasekera, R. and Zhonghai, Lu and Jantsch, A. and Shippen, D. (2009) Physical Mapping and Performance Study of a Multi-Clock 3-Dimensional Network-on-Chip Mesh. In: Proceedings of the IEEE International Conference on 3D System Integration (3D IC), 2009 :. IEEE, San Francisco. ISBN 978-1-4244-4511-0

Contribution to Conference

Weerasekera, Roshan and Grange, M. and Pamunuwa, Dinesh B. and Tenhunen, Hannu (2010) On signalling over through-silicon via (TSV) interconnects in 3-D integrated circuits. In: Design Automation and Test in Europe (DATE) Conference, 2010-01-01.