A digital partial built-in self-test structure for a high performance automatic gain control circuit

Lechner, A and Ferguson, J and Richardson, A and Hermes, B (1999) A digital partial built-in self-test structure for a high performance automatic gain control circuit. In: DESIGN, AUTOMATION AND TEST IN EUROPE CONFERENCE AND EXHIBITION 1999, PROCEEDINGS. IEEE COMPUTER SOC, LOS ALAMITOS, pp. 232-238. ISBN 0-7695-0078-1

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Abstract

It is now widely recognised that Design-for-Testability and Built-in Self-Test techniques rc ill be mandatory to meet test and quality specifications in next generation mired signal integrated systems. This paper describes a new digital on-chip post processing function capable of reducing production test time for a high performance automatic gain control circuit by 70%.

Item Type:
Contribution in Book/Report/Proceedings
Subjects:
?? DESIGN-FOR-TESTANALOGBISTDACADC ??
ID Code:
50478
Deposited By:
Deposited On:
25 Oct 2011 15:31
Refereed?:
Yes
Published?:
Published
Last Modified:
17 Sep 2023 03:44