Special Issue: Mixed-Technology Testing

UNSPECIFIED (2009) Special Issue: Mixed-Technology Testing. Microelectronics Journal, 40 (7). p. 1041.

Abstract

Rapid growth in system integration is making mixed-technology testing increasingly important. Complex heterogeneous systems embed today micro-sensors and micro-actuators in order to interface silicon-based microelectronics with the physical world, augmenting the computational ability of microprocessors with perception and control capabilities, thus expanding the space of possible designs and applications. Areas such as communications, video technologies, environment and process control, instrumentation and measurement, automotive devices, optical, biochemical, electrochemical and many other MEMS-based systems are benefiting from mixed-technologies. The success of these applications, as determined by their quality and reliability, requires the integration of comprehensive and heterogeneous test methodologies and tools into design and test environments. This special issue provides a nice sample of works dealing with this heterogeneity that bring new research and development in mixed-technology testing. It features 5 papers addressing characterisation and test, fault simulation, built-in self-test, fault tolerance and proactive diagnostics. The papers deal with MEMS, biofluidics integrated systems, microprocessors and board interconnects. Three of those are extended versions of the preliminary work presented at the 12th IEEE International Mixed-Signals Testing Workshop, held in Edinburgh, United Kingdom, 21–23 June 2006. The first paper, entitled “Thermal Transient Characterisation of the Etching Quality of Micro Electro Mechanical Systems” and authored by P. Szabó, B. Németh and M. Rencz, shows, through simulation and measurement, how efficient it can be a non-destructive test based on thermal transient analysis to reveal differences in the amount of material of etched layers of MEMS structures. In the paper “Fault Co-Simulation for Test Evaluation of Heterogeneous Integrated Biological Systems”, J. Kerkhoff and X. Zhang show interesting fault simulation results obtained from a heterogeneous integrated device combining biofluidics and industrial mainstream 90 nm CMOS/DMOS technology. The third paper, entitled “Pseudorandom BIST for Test and Characterisation of Linear and Nonlinear MEMS”, by A. Dhayni, S. Mir, L. Rufer, A. Bounceur and E. Simeu, proposes a digital built-in self-test scheme based on the pseudorandom technique to ensure high-quality test metrics for parametric variations in linear and nonlinear MEMS. R. Bastos, F. Kastensmidt and R. Reis discuss, in the paper “Design of a Soft-Error Robust Microprocessor”, the costs associated to protecting a commercial microprocessor, at RT level, against soft-errors. The fifth and last paper of this issue, “A Prognostic Method for the Embedded Failure Monitoring of Solder Interconnections with 1149.4 Test Bus Architecture” by J. Voutilainen, J. Putaala, M. Moilanen and H. Jantunen, describes the feasibility of accurate low frequency measurements in predicting the breakdown of modern lead free ball grid array board interconnections. We hope that this set of articles will motivate readers to promote ever more research and development activities in the crucial and difficult domain of mixed-technology testing. Finally, we would like to thank all authors, the reviewers, the Microelectronics Journal Editor-in-Chief and Editorial Staff, for their valuable contribuiton to this special issue.