Zheng, Li-Rong and Pamunuwa, Dinesh B. and Tenhunen, Hannu (2000) Accurate a priori signal integrity estimation using a multilevel dynamic interconnect model for deep submicron VLSI design. In: Proceedings of the 26th European Solid-State Circuits Conference, 2000. ESSCIRC '00. :. IEEE, pp. 352-355.
A multilevel dynamic interconnect model was derived for accurate a priori signal integrity estimates. Cross-talk and delay estimations over interconnects in deep submicron technology were analyzed systematically using this model. Good accuracy and excellent time-efficiency were found compared with electromagnetic simulations. We aim to build a dynamic interconnect library with this model to facilitate the interconnect issues for future VLSI design.
|Item Type: ||Contribution in Book/Report/Proceedings|
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|Subjects: ||?? ta ??|
|Departments: ||Faculty of Science and Technology > Engineering|
|ID Code: ||33275|
|Deposited By: ||Mr Richard Ingham|
|Deposited On: ||10 May 2010 10:14|
|Last Modified: ||24 Mar 2017 03:48|
|Identification Number: |
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