Bandwidth optimization for through silicon via (TSV) bundles in 3D integrated circuits.

Weldezion, A. and Weerasekera, Roshan and Pamunuwa, Danesh B. and Zheng, Li-Rong and Tenhunen, Hannu (2009) Bandwidth optimization for through silicon via (TSV) bundles in 3D integrated circuits. In: Workshop Notes, Design, Automation and Test in Europe (DATE). UNSPECIFIED, Nice.

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Uncontrolled Keywords:
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ID Code:
31108
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Deposited On:
18 Dec 2009 16:15
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Last Modified:
09 Aug 2020 07:48