Weldezion, A. and Weerasekera, Roshan and Pamunuwa, Danesh B. and Zheng, Li-Rong and Tenhunen, Hannu (2009) Bandwidth optimization for through silicon via (TSV) bundles in 3D integrated circuits. In: Workshop Notes, Design, Automation and Test in Europe (DATE). UNSPECIFIED, Nice.
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Contribution in Book/Report/Proceedings
Uncontrolled Keywords:
/dk/atira/pure/researchoutput/libraryofcongress/ta
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ID Code:
31108
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Deposited On:
18 Dec 2009 16:15
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Published
Last Modified:
26 May 2023 23:25