Pamunuwa, Dinesh B. and Öberg, Johnny and Millberg, Mikael and Zheng, Li-Rong and Jantsch, Axel and Tenhunen, Hannu (2004) A study on the implementation of 2-D mesh-based networks-on-chip in the nanometre regime. Integration, the VLSI Journal, 38 (1). pp. 3-17. ISSN 0167-9260
Full text not available from this repository.Abstract
On-chip packet-switched networks have been proposed for future giga-scale integration in the nano-metre regime. This paper examines likely architectures for such networks and considers trade-offs in the layout, performance, and power consumption based on full-swing, voltage-mode CMOS signalling. A study is carried out for a future technology with parameters as predicted by the International Technology Roadmap for Semiconductors to yield a quantitative comparison of the performance and power trade-off for the network. Important physical level issues are discussed.