Bratt, Adrian and Olbrich, T. and Dorey, A. P. (1994) Class AB cascode current memory cell. Electronics Letters, 30 (22). pp. 1821-1823. ISSN 1350-911X
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Abstract
The presented sampled-current memory cell demonstrates class AB operation where the bipolar input current magnitude may exceed twice the quiescent bias current even though full cascode regulation is maintained. Calculation of the necessary safety margin to accommodate process tolerances is shown to be simplified compared with the standard regulated cascode cell.
Item Type:
Journal Article
Journal or Publication Title:
Electronics Letters
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Uncontrolled Keywords:
/dk/atira/pure/subjectarea/asjc/2200/2208
Subjects:
?? bipolar integrated circuitscascade networksintegrated memory circuitsswitched networkselectrical and electronic engineeringta engineering (general). civil engineering (general) ??
Departments:
ID Code:
20516
Deposited By:
Deposited On:
05 Dec 2008 14:45
Refereed?:
No
Published?:
Published
Last Modified:
18 Sep 2024 00:18