Translating Structural Process Properties to Petri Net Markings

Linker, Sven (2012) Translating Structural Process Properties to Petri Net Markings. In: 2012 12th International Conference on Application of Concurrency to System Design :. IEEE. ISBN 9781467316873

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We introduce a spatio-temporal logic PSTL defined on Pi-Calculus processes. This logic is especially suited to formulate properties in relation to the structural semantics of the Pi-Calculus due to Meyer, a representation of processes as Petri nets. To allow for the use of well-researched verification techniques, we present a translation of a subset of PSTL to LTL on Petri nets. We further prove soundness of our translation.

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16 Jun 2021 13:57
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28 Nov 2023 10:39