Jiang, Richard M. (2007) An area-efficient FFT architecture for OFDM digital video broadcasting. IEEE Transactions on Consumer Electronics, 53 (4). pp. 1322-1326. ISSN 0098-3063
Full text not available from this repository.Abstract
In this paper, a novel high-performance 8k-point fast Fourier transform(DFT) processor architecture for OFDM digital video broadcasting(DVB) is proposed based on a novel radix-8 FFT architecture. Distributed arithmetic(DA) is used to implement the basic 8-point FFTs directly, where the hardware cost of complex multipliers and adders can be greatly reduced. The twiddle multiplications are performed by CORDIC-based twiddle multipliers. The results show that the proposed processor architecture can greatly save the area cost while keeping a high-speed processing speed, which may be attractive for many real-time DVB-T systems.