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Towards a generic programming model for network processors

Lee, K and Coulson, G and Blair, Gordon and Joolia, A and Ueyama, J (2004) Towards a generic programming model for network processors. In: 12th IEEE International Conference on Networks, 2004 (ICON 2004) Vols. 1 & 2 , Proceedings. IEEE, New York, pp. 504-510. ISBN 0-7803-8783-X

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Abstract

Network Processors (NPs) are emerging as a cost effective network element technology that can be more readily updated and evolved than custom hardware or ASIC-based designs. Moreover, NPs promise support for run-time reconfiguration of low-level networking software. However, it is notoriously difficult to develop software for NPs because of their complex design, architectural heterogeneity, and demanding performance constraints. In this paper we present a run-time component-based approach to programming NPs. The approach promotes conceptual uniformity and design portability across a wide variety of NP types while simultaneously exploiting hardware assists that are specific to individual NPs. To show how our approach can be applied in a wide range of types of NPs we characterise the design space of NPs and demonstrate the applicability of our concepts to the various classes identified. Then, as a detailed case study, we focus on programming the Intel IXP1200 NP. This demonstrates that our approach can be effectively applied, e.g. in terms of performance, in a demanding real-world NP environment.

Item Type: Contribution in Book/Report/Proceedings
Subjects: UNSPECIFIED
Departments: Faculty of Science and Technology > Lancaster Environment Centre
Faculty of Science and Technology > School of Computing & Communications
ID Code: 52557
Deposited By: ep_importer_pure
Deposited On: 08 Mar 2012 11:08
Refereed?: No
Published?: Published
Last Modified: 10 Apr 2014 00:51
Identification Number:
URI: http://eprints.lancs.ac.uk/id/eprint/52557

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