Lancaster EPrints

Design and self-test for switched-current building blocks

Olbrich, T and Richardson, A (1996) Design and self-test for switched-current building blocks. Ieee design & test of computers, 13 (2). pp. 10-17. ISSN 0740-7475

Full text not available from this repository.

Abstract

This switched-current memory cell with a built-in self-test option serves as a building block for a range of analog functions. As an example application, the authors present a divide-by-two circuit for reference signal generation in algorithmic A/D converters. They also describe two self-test approaches for these building blocks and evaluate their effectiveness. The self-test functions are easy to apply, require very little overhead, and result in fault coverage up to 95% for shorts and 60% for open circuits. Analysis reveals that 100% testability may not be achievable in a cost-effective way for mixed-signal circuits.

Item Type: Article
Journal or Publication Title: Ieee design & test of computers
Subjects: UNSPECIFIED
Departments: Faculty of Science and Technology > Engineering
ID Code: 50459
Deposited By: ep_importer_pure
Deposited On: 20 Oct 2011 16:39
Refereed?: Yes
Published?: Published
Last Modified: 09 Apr 2014 22:46
Identification Number:
URI: http://eprints.lancs.ac.uk/id/eprint/50459

Actions (login required)

View Item